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Intel's new plan to catch up on process nodes

QuizzicalQuizzical Member LegendaryPosts: 23,027
edited April 7 in Hardware
https://www.oregonlive.com/silicon-forest/2021/03/whats-in-a-nanometer-intel-may-renumber-its-chips.html

Most probably aren't familiar with that site, but it's a local newspaper.  The Oregonian is Portland's major newspaper.  The key quote is here:

"Employees say Ann Kelleher, the Hillsboro vice president who runs Intel’s manufacturing group, notified them last week that Intel plans to change its numbering conventions to match the industry standard."

For what it's worth, Hillsboro is a suburb of Portland and one of Intel's three major locations in the United States.  That's why it would make sense for a Portland, Oregon newspaper to pick up on this story.

So what is the "industry standard" for process node names?  It used to be that the node name referred to the smallest feature that the node could etch in a chip.  Or you could just argue that the industry standard was whatever Intel said it was, and other foundries would give their process node the same name that Intel gave theirs even if Intel's node was better.

But then Intel got stuck on 14 nm.  Renaming it as 14+, then 14++, then whatever else they're calling it today doesn't change the number.  TSMC has now been the clear market leader for the last couple of years, with Samsung trying to keep up.  And they've gotten very loose on their process node names.

So now TSMC and Samsung are both making chips on "5 nm" nodes, while Intel is struggling with 10 nm and hoping to move to 7 nm in 2023.  Smaller features are better, so this looks bad for Intel, right?

The problem with nomenclature is that Intel's "7 nm" node is likely to be better outright than Samsung's "5 nm", and might well be competitive with TSMC's "5 nm".  Well, if Intel's 7 nm node is actually good, which is hardly guaranteed after the mess that is their 10 nm node.

So how can Intel catch up?  Well, why not just rename their "7 nm" node as "5 nm"?  Or "3 nm", since TSMC and Samsung might be calling something that by the time Intel "7 nm" is ready.  Or if you're just making up numbers anyway, why not call it "2 nm" and take the lead?

In a sense, it probably doesn't matter that much.  Apple, Qualcomm, AMD, Nvidia, and Bitmain don't just pick a foundry by asking who is willing to give their process node a name with the smallest number.  Technical specs matter, and to the extent that chip designers care about the name of a process node, it's really only for marketing reasons so that they can use the node name to tell their customers how awesome their parts are.  And even then, consumers who are looking for something with high performance tend to look at benchmarks, not process nodes or transistor counts.

But there is also the issue that numbers can only get so small without being physically ridiculous.  I don't mean that you can't go below 1 and remain positive.  You absolutely can change the units to picometers.  Intel used to be on a 10 um node, not 10 nm, after all.  (Micrometers technically uses a Greek mu, but that's hard to type here, and it looks kind of like a u, so I use a u for it.)  And they somehow found a way to call nodes something less than 1 um = 1000 nm.

But adjacent atoms in a standard diamond cubic silicon crystal are about 220 pm apart.  If you claim that your node is can carve features in silicon of 400 pm or less, then you're claiming to manipulate individual silicon atoms, and I don't believe that foundries are going to do that by the billions with no defects anytime soon.  (Not to mention that chips aren't pure silicon, anyway.)  A 200 pm node would effectively claim to carve up individual silicon atoms into something smaller (or just not use silicon in the first place), and while that is kind of possible, hydrogen doesn't exactly have similar chemical properties to silicon.

So what's next for process node names?  They might stop naming them after lengths and start calling them something else instead.  Process nodes for NAND flash have already done that, in part because the move to 3D NAND allowed increasing densities at a "larger" process node size by stacking dozens of layers.

DRAM manufacturers have partially moved away from length-based names, too.  For example, Micron will tell you about their "10 nm class" nodes, by which they mean "something in the range of 10-19 nm".  They had a "1x" process node, then "1y", then "1z", and now "1a" (that's a Greek alpha, which I can't type here), but they won't tell you what x, y, z, or a are.  And maybe they shouldn't, as those wouldn't be entirely meaningful anyway.  All that you really care about for DRAM is capacity, performance, power, cost, and reliability, and when you go shopping for memory, you don't care what process node it was made on.

So what about Intel's process node names?  Well, what about TSMC's and Samsung's?  What matters is how good the node is.  The problem with Intel's 10 nm node is not that they call it "10 nm".  It's that the node is greatly delayed and not very good and yields are reportedly awful.  If Intel were to suddenly put out the world's highest performance, most efficient CPUs on a "45 nm" process node (I mean today, not in 2007 when they actually did this), that it was 45 nm wouldn't be an argument against buying it.
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